Transistor measurements

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Imagicom
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Transistor measurements

Post by Imagicom » Sun Aug 05, 2018 11:37 am

I am thinking of buying a PicoVNA, but wanted to ask first about it's capabilities for measuring transistors (BJT and MOSFET). My application is not for RF transistors, but rather for low frequency transistors (Ft < 2GHz). However, I want to accurately measure the device capacitance for which I know that S-parameter measurements can be used, and then with post processing, the device capacitance can be calculated.

So, my questions are:

1. What are the requirements / specifications required for the external bias supplies and do you have any recommendations on what types of equipment to use?
2. Have you any example data on the use of the PicoVNA for measuring e.g. BJT S-parameters?
3. Are there any application notes or similar that discuss the measurement of semiconductor devices using the PicoVNA.

Many thanks

Andy

Martyn
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Re: Transistor measurements

Post by Martyn » Mon Aug 06, 2018 1:59 pm

Can you email support@picotech.com as we will need our RF Application Specialist to handle this enquiry.
Martyn
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naltieri
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Re: Transistor measurements

Post by naltieri » Mon Jan 28, 2019 3:39 pm

Have done something similar in the past but used an external bias Tee, this provides the DC isolation but allows you to pass the VNA signal through to the device. Connecting the bias Tee to a power supply allows one to adjust the supplied voltage. If your looking to assess for junction capacitance you can set a VNA to S11 and set VNA display format to smith chart R+jx.

You will need to make or obtain a suitable test fixture for your DUT and have a touchstone file of the test fixture which describes its 2 port scattering parameters, use the de-embedding features to remove the test fixture from your measurements.

Having a VNA with a time domain mode can help as one can pinpoint the impedance at the legs of the transistor, (Turns your VNA display into a mode which is similar to a TDR, except measurements are performed in the frequency domain and transposed mathematically), if doing this use two channels, use one channel set to real format so that you can visualise the exact position of the transistors legs (use a known load or short circuit on the transistors legs to confirm correct positioning), use a second VNA channel also set in time domain mode and display format set to smith R+jx, place a marker to read off the impedance at the exact position of the transistors leg. Make sure the display number of points is at least 1001, if the VNA your using lets you specify the impulse rise time adjust this to minimum.

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